4-Request Priority Encoder VHDL Code (Conditional Signal Assignment)

Conditional Signal Assignment
Syntax:
• Overall effect somewhat like if-then-else
• Simplified syntax:
signal_name
<= value_expr_1 when boolean_expr_1 else value_expr_2 when boolean_expr_2 else value_expr_3 when boolean_expr_3 else . . . value_expr_n Sample VHDL code for 4-request priority encoder:
library ieee;
use ieee.std_logic_1164.all;
entity prio_encoder is
port(
r: in std_logic_vector(4 downto 1);
pcode: out std_logic_vector(2 downto 0)
);
end prio_encoder;

architecture cond_arch of prio_encoder is
begin
pcode <= "100" when (r(4)='1') else
"011" when (r(3)='1') else
"010" when (r(2)='1') else
"001" when (r(1)='1') else
"000";
end cond_arch;